This invention relates to digital function generators in general and more particularly to a function generator with reduced storage requirements.
Function generators including an oscillator, an address counter, a storage matrix with 2.sup.n addresses at m bits as well as a digital-to-analog converter are known. Such function generators for generating predominantly slow, nonlinear periodic events have been used, for instance, for the faithful simulation of electrocardiograms. In this function generator, the time of a period of the signal to be simulated as well as the amplitude range of the signal are quantized into 256 steps. For each of the 256 points in time (addresses) of the period, the corresponding amplitude values can be stored in a PROM. In this specific case, the memory must have 256 addresses at 8 bits each. These 256 addresses of the memory are addressed sequentially via a frequency-adjustable reference generator (oscillator) as well as an address counter. The digitally stored amplitude values are converted into corresponding analog signals via a digital-to-analog converter. A filter connected to the output may be used for additionally smoothing the signal. If it is desired to increase the resolution of a signal simulated in this manner, for instance, to 0.1%, then a storage matrix of 1024.times.10 bits is required. The presently available storage elements, however, consist only of 1024.times.8 bits, so that two such storage elements would be required for this specific purpose.